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| Paper IPM / Cognitive / 13995 |
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| Abstract: | |||||||
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This paper reports a novel high-compliance, very accurate and ultra-high output resistance current mirror. These features are achieved by employing a combination of negative and positive feedbacks in the proposed circuit. This makes the proposed current mirror unique in gathering ultra-high output resistance, high compliance,
and high accuracy ever demanded merits. The principle of operation of this structure is discussed, its main formulas are derived and its outstanding performance is verified by Cadence post-layout simulations. Designed in the IBM 130-nm standard CMOS process, the circuit consumes 230 �? 110 μm2 of silicon area. Post-layout simulation results indicate that with a 3.3-V power supply, output voltage compliance of
0.93VSupply is achieved at a maximum output current of 96 μA. Moreover, an extremely ultra-high output resistance of 320GΩ is achieved, which is one of the highest reported values of output resistance for current mirrors implemented using regular CMOS technology. The 3 dB upper cut-off frequency of the proposed circuit is 100MHz and the output/input current transfer error is 0.1
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