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Paper   IPM / Cognitive / 13334
School of Cognitive Sciences
  Title:   A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems
  Author(s): 
1.  H. Hossein-Nejad
2.  A. Jannesari
3.  A.M. Sodagar
4.  J.N. Rodrigues
  Status:   Published
  Journal: Int. J. Circ. Theor. Appl.
  Year:  2013
  Publisher(s):   Published online in Wiley Online Library (wileyonlinelibrary.com). DOI: 10.1002/cta.1955
  Supported by:  IPM
  Abstract:
A 128-channel neural signal processor for implantable neural recording microsystems is presented. The processor compresses the neural information of 128 simultaneous recording channels using discrete cosine transform, achieving a compression factor of 69 at the expense of a 5.6proposed processor is implemented on register transfer level and synthesized in a 65-nm complementary metal-oxide semiconductor process. The post-layout simulated power consumption at 1.2V is 33.06 μW (258nW per channel) at an area cost of 0.46mm2.

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